(Real Mode)

The classic addressing mode used in the first models of the family. Uses a segmented memory model, organized as follows: The address space in 1MIB is divided into 16-byte blocks called paragraphs. Total paragraphs in 1 MIB - 65536, which makes it possible to numbered their 16-bit numbers. Memory segments have a size of 65536 bytes, and always start on the border of the paragraph. The memory cell address consists of their two parts: the number of the paragraph from which the segment and displacement begins inside the segment and is usually written as SSSS: OOOO, where S and O are hexadecimal numbers. SSSS is called a segment component address, and oooo - offset. The address of the cell, issued on the bus, is a segment component multiplied by 16 plus offset. The segment component is placed in a special register called segment, and offset to the IP register (register of instructions). Microprocessors 8086/8088, 80186/801888 and 80286 had four segmented registers, i.e. could work simultaneously with four memory segments that have a certain purpose. In 80386, two more, not having a special purpose added.

• Segment registers and their appointment:
  • CS. - Code segment. Used to select the program commands;
  • Ds. - Data segment. Used by default to access data;
  • Es - Additional segment. Is a data recipient in row processing commands;
  • SS. - Stack segment. Used to place the software stack;
  • FS. - Additional segment register. Special destination has no. Appeared in the 80386 processor;
  • GS. - Similar to the previous one, but in new processors with a 64-bit architecture has a special status: can be used to quickly switch contexts.

Despite the fact that segment registers have special assignments, the architecture allows when accessing data to replace one segment to any other. Code segments, stack and recipient strings always use CS, SS and ES registers and cannot be changed. The total amount of memory addressed in real mode is 1048576 bytes (0000: 0000-F000: FFFF (00000-FFFFF) -Logic address (physical address) in hexadecimal system Number). A segment approach allows to divide all memory on 16 segments starting with addresses, multiple 64 KB. These 16 segments are called memory pages. Typically, the division on the pages is used to share devices, the interfaces of which are displayed on the address space of the memory; Then each such device uses one memory page, and the cell address in the address space of the device will coincide with the displacement in the computer's memory segment. So in IBM PC computers, the pages of C 11 to 15 are used as "video memory" (address space of the video adapter), and the sixteenth page (located in the FFFF addresses: 0000 - FFFF: FFFF) received the name "Upper Memory Area" (High Memory Area), which Subsequently, MS-DOS used to accommodate their kernel and I / O buffers, leaving more "normal" memory applied programs. Thus, the user really affordable memory is 640 KB (the first 10 pages).

Also in real regime there is no memory protection and delimitation of access rights, so it has already been practically out of use. It is the default mode for all models of the x86 family processors.

Protected Mode (Protected Mode)

A more advanced mode, the first 80286, which appeared in the 80286 processor and in the future it is repeatedly improved. It has a large number of Conditions for which you can trace the evolution of the CPU family. In this mode, memory protection, task contexts and means for organizing virtual memory are supported. Similarly to the real mode, a segmented memory model is also used here, however, an already organized according to another principle: the division into paragraphs is absent, and the location of the segments is described by special structures (descriptor tables) located in random access memory. In addition to the base address of the segment segment, descriptors contain the size of the segment (more precisely, the maximum available offset) and various segment attributes used to protect the memory and determine the rights of access to the segment for various software modules. There are two types of descriptor tables: global and local. Global table describes segments operating system and shared data structures. The local table can be defined for each specific task (process). Memory segments are also selected all the same segment registers; However, instead of the paragraph number, the segment register contains a special structure (selector) containing the descriptor index in the table. The descriptor itself is loaded from memory to an internal software inaccessible register (cache), tied to each segment register and automatically downloaded at the time of its modification.

Each program module performed in the protected mode is determined by its code segment, an explicit CS register, which determines its privileges for access to data and other modules. There are 4 levels of privileges 0,1,2 and 3, called protection rings. Ring 0 is the most privileged. It is intended for operating system kernel modules. Ring 3 - the least privileged, and is intended for user programs. Rings 1 and 2 are used only by some operating systems. Data segments also have access rights attributes that provide access only to the code that has the same or higher privileges. The rings system allows you to flexibly allocate access to the code and data.

The 80386 processor, which appeared in 1985,, in contrast to its predecessors, became 32-bit. It has the opportunity to address up to 4GIB memory, which made it possible to create memory segments in size in all address space. Therefore, new operating systems used a degenerate memory organization model when all segments begin with a zero address. Such a model was called flat (Flat Memory Model), and the address is set by one entire 32-bit number (although it is essentially a displacement inside the degenerate segment), and the segments themselves are used exclusively for the organization of protection on the rings of privileges.

Virtual 8086 mode (Virtual 8086 Mode, V86)

It is a consignable-protected, but uses an address model similar to the real mode. It is used to launch old 8086 programs in the medium of modern operating systems. Unlike the actual mode, where all programs have access to all memory (ring 0), in the V86 mode, the program is performed in the ring 3 (the least privileged), and special situations and interrupts are processed by conventional protected mode procedures.

Mixed modes

The segment MMU of modern processors, despite the cardinal differences of the two main modes, in both works in a similar way. This allows you to organize non-standard modes not described in the official documentation, but sometimes very useful when writing programs. Since it is known that internal cache descriptors are used in all modes, and it is they are used to address memory, when you understand the logic of their work, it is possible to load non-standard values \u200b\u200bfor the current mode. In particular, you can create a descriptor table in real mode, set the PE flag, load the segment registers already in protected mode, and then immediately reset the PE flag. Until the next reboot of the segment register, its cache of the descriptor will contain a value corresponding to the protected mode, and if it has been loaded properly, the possibility of addressing up to 4GIB memory will appear. Similar non-standard modes received the common name Unreal Mode and BIOS are actively used by "AMI personal computers. It should be noted that in the 80286 processor it was also possible to download non-standard values \u200b\u200bof the descriptor cache using an undocumented Loadall command; what was especially relevant, since the 80286 processor did not allow the flag. PE (from the protected mode was released by resetting the processor, which affected performance).

Patch organization memory

In processors, starting from 80386, a powerful MMU appeared, which allows you to organize the display of memory pages, which was another reason for the transition to a flat model with the arrival of 32-bit computing. Using the broadcast of the pages, the operating system can create its own linear address space for each process; Each page has access rights attributes. Only in contrast to segments, there are only 2 such levels: the user and the supervisor. But for most modern operating systems, this is quite enough. It should be noted that the MMU page is available only in protected mode.

Extensions

PAE

In later 32-bit processors (starting with Pentium Pro), PAE appears (Physical Address Extension) - addresses expansion physical memory up to 36 bits (the possibility of addressing 64 GB of RAM). This change did not affect the discharge of tasks - they remained 32-bit.

MMX

Additional "multimedia" (eng. Multi-Media Extensions) A set of instructions that perform in a few characteristic encoding / decoding processes of streaming audio / video data for one machine instruction. For the first time appeared in the Pentium MMX processors. Provides only integer calculations.

SSE

3DNow!

A set of instructions for streaming the real numbers of single accuracy. Supported by AMD processors starting with K6-2. Intel processors are not supported.

3DNow instructions! Use the MMX registers as operands (one register is placed two numbers of single accuracy), therefore, in contrast to SSE, when switching tasks is not required to separately save the context of 3DNOW!.

64-bit mode

By the beginning of the 2000s, it became obvious that the 32-bit address space of the X86 architecture limits the performance of applications operating with large data volumes. The 32-bit address space allows the processor to directly address only 4 GB of data, this may be insufficient for some applications related, for example, with video processing or database service.

To solve this problem, Intel has developed a new IA-64 architecture - the basis of the ITANIUM processor family. To ensure backward compatibility with old applications using 32-bit code, the emulation mode was provided in IA-64. However, in practice, this mode of work turned out to be extremely slow. AMD has proposed an alternative solution to the problem of increasing the processor bit. Instead of to invent perfectly new system commands, it was proposed to introduce a 64-bit expansion to an already existing 32-bit X86 architecture. Initially, the new architecture was called x86-64, later it was renamed AMD64. Initially, a new set of instructions was supported by Opteron, Athlon 64 and Turion 64 of AMD. The success of the processors using AMD64 technology, along with a sluggish interest in the IA-64 architecture, prompted Intel licensed set of AMD64 instructions. At the same time, a number of specific instructions not attended in the original AMD64 set were added. A new version Architecture was named EM64T.

In the literature and names of the versions of their products, Microsoft and Sun are used by the AMD64 / EM64T naming, when it comes to 64-bit versions of their Windows and Solaris operating systems, respectively. At the same time, program providers for GNU / Linux operating systems, BSD use "x86-64" or "AMD64", Mac OS X uses the "x86_64" label if it is necessary to emphasize that this software uses 64-bit instructions.

Virtualization

Processors

Intel processors

The 16-bit I8086 processor was created in June 1978. At first, it worked at 4.77 MHz frequencies, then 8 and 10 MHz. It was manufactured using 3 μM technology and had 29,000 transistors.

A little later, in 1979, I8088 was developed, which worked at the same frequencies as i8086, but used an 8-bit data bus (the internal tire of the processor remained 16-bit) to ensure greater compatibility with the periphery used at that time . Due to the lower price, widely used in early IBM PC systems instead of 8086.

/80188

In addition, the MMX block was added to the Pentium II kernel.

Celeron

Celeron is a simplified modification of Pentium II / III / IV / CORE / CORE 2 processors for building inexpensive computers. The first Celeron (Covington core, frequency 266/300 MHz) was Pentium II, devoid of a second level cache and a plastic cartridge. Printed circuit board Also was simplified. Such a package received the SINLGE EDGE Processor Package. As a result, these processors demonstrated depressingly low productivityAlthough it was worth very inexpensive and easily added to 50% of the frequency during acceleration. All subsequent variants of this processor had an integrated full-frequency cache of the second level. The main differences of Celeron processors in the volume of this cache and the frequency of the tire, and often in increased latency of access to cache-memory relative to the original processor.

Curious Fact: The second modification of the Celeron (MENDOCHINO core, frequency 300..533 MHz) on many tasks showed higher performance than equally-frequency Pentium II. This was due to the fact that the small (128 KB) cache Mendochino was located on a single crystal with the kernel and worked at the core frequency, while the large (512 KB) cache Pentium II was quite far from the nucleus and worked at half frequency. Intel did not allow more such mismires, and all subsequent Celeron is guaranteed slower than the full-fledged processors of the same generation.

Pentium III (I686)

Pentium III, made initially according to a technological process of 0.18 microns, differs from P2 mainly by adding SSE instructions. Late processors of this series were manufactured according to the technological process of 0.13 μm, a full-frequency cache-integrated kernel was obtained in the crystal (first 256 KB, then 512 KB) and served as the prototype of the Pentium M architecture processors. We produced in constructs as SECC / SECC2 (SLOT 1) and FCPGA-370 (PGA-370).

Pentium 4.

A fundamentally new processor with hypercupilization (hyperpipeline) - with a conveyor consisting of 20 steps. According to Intel statements, processors based on this technology make it possible to achieve an increase in frequency by about 40 percent relative to the P6 family at the same technological process (with the "correct" processor loading). In practice, the first models worked even more slowly than Pentium III. Later are supplemented with support for 64-bit code.

Core / Core 2

After the last generation of Pentium 4 processors on the TEJAS kernel, it was decided to turn to another product branch. The basis of new processors is the recycled Pentium M core. Thus, the P6 kernel used in the Pentium Pro processors continued its evolution, adjusting the frequency from 150 MHz to 3.2 GHz and to acquire a new systemic bus, support for multi-core, multimedia instructions.

Core processors are a solution for laptops, single and dual-core, executing 32-bit code.

CORE 2 processors are available in both desktop and mobile execution, include a number of microarchiterate improvements and are capable of executing a 64-bit code. The number of core varies from one to four.

Core i3 / Core i5 / Core i7 / Core i9

Further development of ideas laid in core processors 2. Saving the main design of the processor nuclei, which appeared the first Core i7 received a modular structure that allows you to easily vary their number, the built-in memory controller (three-channel DDR3 in the highest segment and two-channel DDR3 in the mass) and a new bus connecting the processor with the chipset. Microarchectural improvements allow Core i7 to show high performance in comparison with Core 2 at equal frequencies. Much attention was paid to the issue of energy efficiency of the new processor.

Later, cheaper Core i5 / i7 appeared with a two-channel memory controller and four cores, then Core i3 / i5 with two cores and a built-in video frame. Announcement of more powerful processors with a three-channel memory controller and six cores are expected and the Core i9.

Atom

Inexpensive supercounty single and dual-core processors intended for use in the so-called network computers - netbooks and nettops (computers in which computing power is donated in favor of economy, silentness and small-size). At the heart, the modified kernel from the first Pentium, which adapted to a new technical process, added the ability to execute a 64-bit code and multimedia instructions, as well as the second-level cache and support for multithreading execution (SMT, analogue of Hyper Threading). To simplify the design, it was decided to abandon the extraordinary execution of the commands, which was not the best effect on performance.

Xeon.

Family of server-oriented processors and multi-threaded calculations.

The first representative of this family was based on the Pentium II architecture, was the Carddridge with a printed circuit board, on which the kernel was mounted, the second-level cache memory and the cache tag. Mounted in the slot 2 socket.

Modern Xeon-s are based on the Core2 / Core i7 architecture.

AMD processors

AM8086 / AM8088 / AM186 / AM286 / AM386 / AM486

Clones of the corresponding processors from Intel. Commonly produced with a maximum frequency on the step higher than the original. So, AM386DX was produced with a maximum frequency of 40 MHz, while i386dx - 33 MHz. Up to 486dx2-66 there were no other differences between the processors. It was impossible to programmatically distinguish these processors.

5x86.

Clone i486. While Intel for i486 stopped at 100 MHz, AMD produced processors with frequencies up to 133 MHz. They also differed in the increased volume of the first level cache (16 KB) and the multiplier (× 4).

Pentium analogs. The first processors developed by AMD independently. Despite the superiority in integer operations over the analogues from Intel (a number of sixth generation technologies were used in the kernel of this processor), the capacity of the floating point calculation unit was significantly inferior in terms of Pentium processors with a similar clock frequency. In addition, there was a bad compatibility with for some manufacturers. The disadvantages of the K5 were extremely exaggerated in various network and other informal discussions and for a long time contributed (in general - unfair) deterioration of the reputation of AMD products from users.

Released in April 1997. Fundamentally new aMD processorbased on the kernel purchased from Nexgen. This processor He had a fifth generation constructive, however, referred to the sixth generation and was positioned as a competitor Pentium II. Involored the MMX block and several recycled FPU block. However, these blocks still worked for 15-20% slower than that of Intel processors similar in the frequency. The processor had 64 KB of the first level cache.

In general, comparable with Pentum II performance, compatibility with old motherboards and earlier start (AMD introduced K6 a month earlier than Intel introduced P-II) made it quite popular, but the problems with production in AMD significantly spoiled the reputation of this processor.

K6-2

Further development of kernel K6. Support for the specialized set of 3DNow commands has been added in these processors! . The real performance, however, turned out to be significantly lower than that of the frequency of Pentium II (this was caused by the fact that performance increase with increasing frequency in P-II was higher thanks to the inner cache) and compete K6-2 were able to compete with Celeron. The processor had 64 KB of the first level cache.

K6-III.

More successful in the technological plan than K6-2, an attempt to create an analogue of Pentium III. However, marketing success did not have. It is distinguished by the presence of 64 KB of the first-level cache and 256 KB of the second-level cache in the kernel, which allowed him to overtake it on an equal clock clock frequency Intel Celeron. And it is not very significant to give up early Pentium III.

Analog K6-III with PowerNow Energy Saving Technology! . Initially intended for laptops, but installed in desktop systems.

Analog C6-III + with a second-level cache cut up to 128 KB.

Athlon

A very successful processor, thanks to which AMD managed to restore almost lost positions in the microprocessor market. Cash first level - 128 KB. Initially, the processor was produced in the cartridge with the placement of the second-level cache (512 KB) on the board and was installed in the Slot A connector, which is mechanically, but not electrically compatible with Intel Slot 1. Then installed in the Socket A connector and had a 256 KB of the second-level cache in the kernel. By speed - an exemplary analogue of Pentium III.

Duron.

Celeron Generations Competitive Pentium III / Pentium 4. It differs from Athlon the volume of the second-level cache (only 64 KB), but integrated into the crystal and operating at the core frequency. Performance is noticeably higher than that of similar Celeron, and when performing many tasks, Pentium III is configured.

Athlon Xp.

Continuation of the development of Athlon architecture. By speed - analogue Pentium 4. Compared to ordinary Athlon, supported support for SSE instructions.

SEMPRON.

Cheaper (due to the reduced second-level cache) an Athlon XP and Athlon 64 processor option.

The first SEMPRON models were smoked at Athlon XP chips on the Thoroughbred and Thorton core, which had 256 KB of the second-level cache, and worked at 166 (333 DDR) tire. Later under the SEMPRON brand produced (and produced) trimmed versions of Athlon 64 / Athlon II, positioned as Intel Celeron competitors. All sempron have a cut-off 2-level cache; Mladdia models Socket 754 had blocked Cool & quiet and x86-64; Socket 939 models had a blocked two-channel memory mode.

Opteron.

The first processor supporting the X86-64 architecture.

Athlon 64.

The first incomplete processor supporting the X86-64 architecture.

Athlon 64 x2.

The continuation of the Athlon 64 architecture has 2 computing kernels.

Athlon FX.

He had a reputation of the "rapid processor for toys." It is, in fact, the Opteron 1xX server processor on desktop sockets without support for REGISTERED-MEMORY. Released with small batches. It is much more expensive than its "mass" fellow.

Phenom

The further development of the Athlon 64 architecture is manufactured in two options (Athlon 64 x2 Kuma), three (Phenom X3 Toliman) and four (Phenom X4 Agena) nuclei.

Phenom II.

The first edition - on the basis of the Joshua kernel, which got VIA along with the Cyrix Developer Team.

The second edition - with the SAMUEL core, developed on the basis and not released IDT Winchip -3. Distinguished the lack of a second-level cache and, accordingly, extremely low levels of performance.

The third edition - with the SAMUEL-2 core, an improved version of the previous kernel equipped with a second-level cache. The processor was produced on a thinner technology and had reduced power consumption. After the release of this kernel, the brand "Via Cyrix III" finally lost the place of "Via C3".

Fourth release - with the ezra core. There was also an EZRA-T version adapted to work with a bus intended for Intel processors with the tualatin kernel. Further development in the direction of energy saving.

Via C7.

Further development VIA C3. Esteher (C5J) core, Cascalization - NanobGa2 (21 × 21 mm), soldered directly on the fee. Added hardware support Secure HASH SHA-1 and SHA-256 and RSA encryption, NX-BIT support, supported MMX, SSE, SSE2 and SSE3. Further reduction in power consumption at operating frequencies up to 2 GHz. Own system tire (VIA V4 800 MHz) for communication with the chipset. Also available in mobile (VIA C7-M) and desktop (VIA C7-D) version.

Via Eden ESP.

An integrated solution that includes the VIA C3 processor with the nehemiah C5P core and the north bridge of the chipset with the built-in UMA graphics. It is extremely low power consumption (up to 7 W at a frequency of 1 GHz). Produced with frequencies from 300 MHz (VIA EDEN ESP 3000) to 1 GHz (Via Eden ESP 10000). Compatible South Bridges - VT8235M, VT8237R + (with SATA support), VT8251 (2 × 1 PCI-E) and VIA 686B.

Via Corefusion

Further development of the ideas of Via Eden ESP. Available in two versions - Via Mark and Via Luke, characterized by an integrated video card, supported by the type of memory and operating frequencies. For Via Mark - this is S3 Graphics Prosavage4 / SDR PC133 / 533/800 MHz, and for Via Luke - Via Unichrome Pro / DDR PC3200 / 533/800/1000 MHz. Compatible South Bridges: VT8235M, VT8237R + (with SATA support), VT8251 (2 × 1 PCI-E) and VIA 686B.

Via Nano.

The first X86-64 VIA processor at the ISAIAH core. Contact-compatible with VIA C7. Produced with frequencies from 1 GHz to 1.8 GHz. Energy consumption of a model of 1.6 GHz - up to 17 W at full load. Among the innovations are extraordinary execution of instructions. Positioned as a competitor Intel Atom.

Processors nec.

He produced a series of processors, some of which (the V20 / V30 core) was programmatically compatible both C and C. Switching between modes of operation was carried out using three additional instructions. The hardware they looked like a strongly accelerated version or.

Processors based on the V33 kernel did not have an emulation mode 8080, but supported using two additional instructions, an advanced addressing mode.

Processors Nexgen.

NX586.

In March 1994, the Nexgen NX586 processor was presented. It was positioned as a competitor Pentium, but initially did not have a built-in coprocessor. The use of own tire entailed the need to apply their own chipsets, NXVL (VESA Local Bus) and NXPCI 820C500 (PCI), and with nothing incompatible processor socket. The chipsets were developed in conjunction with VLSI and Fujitsu. NX586 was a supercalar processor and could execute two instructions for the tact. Cache L1 was separate (16 Kbytes under the instructions + 16 KB for data). The L2 cache controller was integrated into the processor, the cache itself was on motherboard. Just like the Pentium Pro, NX586 inside was the RISC processor. The lack of support for CPUID instructions in the early modifications of this processor led to the fact that it was defined as a fast 386 processor. With this, it was connected with the fact that Windows 95 refused to be installed on computers with processors. To solve this problem applied special utility (Idon.com), representing NX586 for Windows as 586 Class CPU. NX586 was produced at IBM capacities.

The NX587 FPU coprocessor was also developed, which was mounted at the factory over the processor crystal. Such "assemblies" were labeled NX586PF. When designing the NX586, the P-Rating - C PR75 (70 MHz) is used to PR120 (111 MHz).

The next generation of Nexgen processors, which has not been issued, but served as the basis for AMD K6.

For many users of the operating room windows systems It is no secret that there are two of its versions of the type of bit. It is 32 bit and 64. To know the discharge of your operating system, you need everyone, because when searching and downloading drivers, programs and games, it is taken into account.

But with the designation of the system's discharge, as well as drivers and programs there is some confusion. There are three designations of two digits - x32, x64 and x86. For this reason, the question of 32 discharge version often arises x64 or x86?

The answer to this question you will find in this article.

The second designation 32 of the discharge version

To continue to exclude the confusion of the design of the software of the software, to which the operating system, driver, programs and games include, remember that there are two main versions of the software of the software - it is 32 bits and 64 bits. 64 The bit version can only be referred to as x64, but 32 bit can be designated both x32 and x86.

Here is an example of the notation of the 64-bit version of the laptop driver on its official website:

And here possible options Notation 32 Bit Version:

Designation of discharge on the site with drivers

Designation of the Blossomy in the program description

Of all the above, it can be concluded that the 32-bit version is X86.

x64 denotes a 64 bit version of any software. Consider this when selecting drivers and any other programs.

In order to view what you have the discharge of the operating system, it is enough to click on the right mouse button on the "Computer" icon on the desktop and select "Properties".

Today, no one will surprise the fact that the favorite family photography, stored and protected from cunning surprises in the form, for example, water from the unlucky neighbors from the top floor forgotten to close the crane, can be some kind of incomprehensible set of numbers and, at the same time , remain a family photo. The home computer has become an equally banal thing as the "drawer" with a blue screen. Will not be surprised if the home PC will soon be equated to household electrical engineering. By the way, the "Progress Engine", all familiar Intel, it will prophete, promoting the idea of \u200b\u200ba digital house.
So, the personal computer took its niche in all spheres of human life. His appearance and becoming as an integral element of lifestyle has already become a story. When we talk about PC, we mean IBM PC-compatible systems, and quite fair. Few of the readers in general did not see the IBM PC-compatible system, all the more used it.

All IBM PC computers and compatible with them are based on processors with X86 architecture. Honestly, sometimes it seems to me that this is not only a processor architecture, but the architecture of the entire PC, such as the ideology of the system of the system as a whole. It is difficult to say who has trapped anyone, whether the developers of peripheral equipment and finite products were adjusted under the X86 architecture, or, on the contrary, they directly or indirectly formed the development paths of X86 processors. The history of X86 is not an even asphalted path, but a combination of various "severity" and the genius of the steps of developers strongly intertwined with economic factors. Knowledge of H86 processor history does not necessarily. To compare the processor of today's reality with his long-standing ancestors is simply meaningless. But to track the general development trends and try to make a forecast, the excursion to the historic past of the X86 architecture is necessary. Of course, serious historical work can take not one volume, and claim the objective and wide coverage of the topic is meaningless. Therefore, to go into the "Life-Time" peripetics of each generation of X86 processors will not, but limit ourselves to the most important events in the whole epopea x86.

1968 year
Fairchild Semiconductor employees: Bob Neuss, manager and inventor of the integrated circuit in 1959, Gordon Moore, who headed scientific research and design development, Andy Grove, a specialist in the field of chemical technologies, and Arthur Rock, which carried out financial support, founded Intel. This name is formed from Integral Electronic.

1969
Former director of the Marketing Department, Fairchild Semiconductor Jerry Sanders and several of his like-minded people, AMD was founded (Advanced Micro Devices), which took the production of microelectronic devices.

1971
When executing one of the orders on the RAM microcircuit, Intel's employee Ted Hoff offered to create a universal "smart" IS. Development was headed by Federico Fedin. As a result, the first Intel 4004 microprocessor was born.

1978
The entire period before this is the background, although the internal events from the earned continuum. This year, the ERA X86 began - intel The I8086 microprocessor was created, which had a frequency of 4.77.8 and 10MHz. Funny frequencies? Yes, these are the frequencies of modern calculators, but it all started. The chip was manufactured in 3 microns technology and had an internal 16-bit design and a 16-bit bus. That is, 16-bit support and, therefore, 16-bit operating systems and programs.
A little later, in the same year, I8088 was developed, the main differences of which was the 8-bit external data bus, which ensured compatibility with the 8-bit strapping and memory used earlier. Also, the argument in his favor was compatible with i8080 / 8085 and Z-80, relatively low price. Whatever it was, but IBM chose I8088 as a CPU for its first PC. Since then, the Intel processor will become an integral part of a personal computer, and the computer itself will be called IBM PC for a long time.

1982 year
Announced i80286. "Two hundred eighty six" became the first X86 processor, penetrated by the Soviet and post-Soviet space large quantity. The clock frequencies 6, 8, 10 and 12 MHz were produced at a 1.5-μM technical process and contained about 130,000 transistors. This chip had complete 16-bit support. For the first time, the appearance of I80286 appeared such a concept as "protected mode", but then still developers of the software did not use its ability to fully. The processor could address more than 1 MB of memory, switched to the protected mode, but back the return was possible after a complete restart, and the segmented organization of access to memory required a significant additional effort when writing a program code. From this output is the fact that I80286 was used rather as fast i8086.

The performance of the chip compared to 8086 (and especially compared to i8088) increased several times and reached 2.6 million operations per second. In those years, manufacturers began to actively use the open IBM PC architecture. At the same time, the period of cloning the processors of the X86 architecture from Intel by third-party manufacturers began. That is, the chip was produced by other firms as an exact copy. Intel 80286 became the basis of the newest on the standards of the IBM PC / AT PC and its numerous clones. The main advantages of the new processor were increased performance and additional addressing modes. And most importantly - compatibility with existing software. Naturally, the processor was also licensed by third-party manufacturers ...
In the same year, AMD concludes with Intel license agreement And on the basis of it begins the production of clones of X86 processors.

1985
This year, it happened, probably, the most significant event in the history of processors with the architecture X86 - Intel was released the first I80386 processor. He became, can be said revolutionary: a 32-bit multitasking processor with the possibility of simultaneously executing several programs. In essence, the most modern processors are nothing but the fast 386th. Modern software Uses the same architecture 386, just modern processors do the same, only faster. Intel 386 ™ has become a big step forward compared to I8086 and I80286. In essence, the most modern processors are nothing but the fast 386th. Modern software uses the same architecture 386, simply modern processors do the same, only faster. Intel 386 ™ has become a big step forward compared to I8086 and I80286. Intel 386 ™ had a significantly improved memory management system compared to I80286, and built-in multitasking tools made it possible to develop an operating system Microsoft Windows. and OS / 2.

In contrast to I80286 Intel 386 ™, it was free to switch from the protected mode to the real and back and had a new mode - virtual 8086. In this mode, the processor could perform several different software threads at the same time, since each of them was performed on an isolated "virtual" 86- y car. In the processor, additional memory addressing modes were introduced with a variable length of the segment, which significantly simplified the creation of applications. The processor was produced at a 1-MKM technological process. The Intel processor was first presented by several models that have formed a family of 386. Here and the famous marketing game begins intel companies, Later, which took place into the separation of one developed kernel into two trading options, in some circle of users and specialists called: "Pentium for the rich, Celeron for the poor." Although that here is bad - and wolves are full, and sheep are intact.
The following models were released:

386DX with a frequency of 16, 20, 25 and 33 MHz had 4 GB of the addressable memory;
386SX with a frequency of 16, 20, 25 and 33 MHz, in contrast to 386DX, had 16, and not a 32-bit data bus, and, respectively, 16 MB of the addressable memory (similarly, at one time, the I8088 processor was "created" from i8086 by reducing the bit external tire to ensure compatibility with existing external devices);
386SL in October 1990 - mobile version Intel 386SX processor with a frequency of 20 and 25MHz.

1989
Intel provides its next processor - Intel 486 ™ DX with a frequency of 25, 33 and 50 MHz. Intel 486 ™ DX became the first processor in the 486 family and had significant (more than 2 times at the same frequency) performance increase compared to the 386 family. It has a first-level cache of 8 KB, integrated into the chip, and the maximum size L2 -cash increased to 512 kb. In i486DX, a floating point computing unit was integrated (FPU - Floating Point Unit), which used to be performed in the form of an external mathematical coprocessor installed on system fee. In addition, this is the first processor whose kernel contained a five-speed conveyor. Thus, the command that passed the first stage of the conveyor continued to be processed on the second, released the first for the next instruction. In essence, the Intel 486 ™ DX processor was a quick Intel 386DX ™, combined with a mathematical coprocessor and 8 KB of cache on one crystal. Such integration allowed to increase the speed of communications between blocks to very high values.
Intel was deployed an advertising campaign with the "Intel: The Computer Inside" slogan. Will pass time and it will turn into a famous advertising campaign "Intel Inside".

1991 year
The AMD - AM386 ™ own processor was created. This was partially built under the influence of a license, partly according to its own development and worked at the maximum frequency of 40 MHz, which exceeded the similar Intel processor.
A little earlier there were first trials between Intel and AMD about the intention of AMD to sell their Intel 386 ™ clone. Intel ceased to need to need to need to need to need to be distributed to third-party manufacturers and to share their own cooking cake with anyone was not going to. As a result, AMD first entered the X86 processor market as a competitor. Other companies followed behind it. So the great opposition of the two giants still began (the rest of the competitors from the distance), which gave the world a lot of good. Intel's secret slogan was the phrase: "The same as Intel, but for a smaller price."
At the same time, Intel produces i486SX, in which there is no FPU (integrated coprocessor integrated) to reduce the product, which, of course, has a negative impact on performance. There were no other differences from i486DX.

1992 year
With the output of the Intel 486DX2 processor, the coefficient of the bus frequency is first used. Up to this point, the internal frequency of the kernel was equal to the frequency of the external data bus (FSB), but the problem of its extension appeared, since the local peripheral tires (at that time VL-BUS) appeared (at that time VL-BUS), and the peripheral devices themselves showed instability at frequency exceeding 33 MHz. Now, with frequency of the FSB 33 MHz tire, the core clock frequency was 66 MHz due to multiplication by 2. Such a reception was entered into history for a long time and is used by a long time, only a multiplier in modern CPUs may exceed 20. Intel 486 ™ DX2 for a long time has become a popular processor and sold in huge The quantities, however,, like his clones from competitors (AMD, Cyrix and others), which have now had some differences from the Intel Original.

1993 year
The first superclarinary X86 processor was released, that is, capable of performing more than one command for the tact - Pentium (P5 code name). This was achieved by the presence of two independent parallel working conveyors. The first processors had a frequency of 60 and 66 MHz and received a 64-bit data bus. For the first time, the first level cache was divided into two parts: separately for instructions and data. But one of the most significant innovations was a fully updated floating point computing unit (FPU). In fact, before that, the X86 platform has not yet been so powerful FPU, and only many years after the output of Intel Pentium, competitors were able to achieve its level of performance. Also, for the first time in the processor, the branch prediction unit was included, since then actively developing engineers.

The essence is as follows: there are many conditional transitions in any program when, depending on the condition, the execution of the program should go on a particular path. Only one of several branches of the transition can be placed in the conveyor, and if it turns out to be completed with the code not that branch, it has to be cleaned and fill out a few of the clocks (depending on the number of conveyor steps). To solve this problem and use branch prediction mechanisms. The processor contained 3.1 million transistors and was manufactured at 0.8-μM process. All these changes made it possible to raise the performance of a new processor to an inaccessible height. In reality, the optimization of the code "under the processor" first was rare and required the use of special compilers. And for a long time, the new processor had to perform programs intended for processors of families 486 and 386.
In the same year, the second generation of Pentium appeared on the P54 kernel, in which all the flaws of P5 were eliminated. In the manufacture of new technological processes 0.6, and later and 0.35 μm. Until 1996, the new processor covered the clock frequencies from 75 to 200 MHz.
The first Pentium played an important role in the transition to new levels of performance of a personal computer, gave impetus and determined the reference guidelines for the future. But with a large jerk in performance, he did not bring any fundamental changes to the X86 architecture.

1994 year
The Intel 486 ™ DX4, AMD AM486DX4 and Cyrix 4x86 continued to the 486 line and using the multiplication of the data bus frequency. Processors had a frequency tripling. Intel DX4 processors worked at 75 and 100 MHz, and AMD AM486DX4 reached 120 MHz. In the processors, the energy management system was widely applied. Other fundamental differences from 486DX2 did not find it.

1995.
Announced Pentium Pro (P6 kernel). New processor tire, three independent conveyors, optimization under a 32-bit code, from 256 kb to 1 MB L2 cache integrated into the processor, and the core operating at the frequency, improved branch prediction mechanism - by the number of innovations, a new processor almost beat records previously installed Intel Pentium.

The processor was positioned for use in servers and had a very high price. The most remarkable that the Pentium Pro computing kernel was actually not the kernel of the architecture x86. Machine codes X86 entering the CPU, inside decoded in a RISC-like microcode, and it was already that the core of the processor was performed. A set of CISC commands as a set of processor commands X86 meant the variable length of commands, which determined the difficulty of finding each individual command in the stream and, therefore, created difficulties in developing programs. CISC teams are complex and complex. The RISC commands are simplified, short, requiring significantly less time to execute a command with a fixed length. Using RISC commands allows you to significantly increase the parallelization of processor calculations, that is, use more conveyors and, therefore, reduce the execution time of commands. The P6 core formed the basis of the three following Intel - Pentium II, Celeron, Pentium III processors.
This year there was also a landmark event - AMD bought a Nexgen company, having advanced architectural developments by that time. The merging of two engineering teams will later bring the world to the H86 processors with the microarchitecture other than Intel and give the impetus to the new round of fierce competition.
The microprocessor forum was first introduced a new MediaGX processor from Cyrix, and its distinctive feature is the integrated memory controller, graphic accelerator, interface tires PCI And productivity commensurate with the performance of Pentium. It was the first attempt to such dense device integration.

1996
A new AMD K5 processor appeared with a supercalar RISC core. However, the RISC core with its command set (ROP commands) is hidden from software and end user, and the x86 commands are converted to the RISC commands. AMD engineers used a unique solution - the x86 commands are partially converted during the premises in the processor cache. Ideally, the K5 processor can perform up to four X86 commands for one clock, but in practice, on average, only 2 instructions are processed.

In addition, the traditional calculation procedures for RISC processors, renaming registers and other "techniques" allow you to increase productivity. The K5 processor was the defendant of the United AMD and Nexgen engineers. The maximum clock frequency never exceeded 116 MHz, but the C5 performance was higher than that of Pentium processors with the same clock frequency. Therefore, in marketing purposes, for the first time in the practice of the CPU labeling, the performance rating was used, which was clearly opposed to the clock frequency of equal Pentium. But the processor still could not adequately move with him, since Pentium is already then reached a frequency of 166 MHz.
In the same year I saw the light of Intel Pentium MMX. The main innovation of the P55C processor - additional teams MXX to a set of commands that almost did not undergo changes from the time of creation of third-generation processors. MMX technology is the use of teams oriented with multimediadia. Special set of SIMD commands (SINGLE INSTRUCTION - MULTIPLE DATA - one command - multiple data) improves performance when performing vector, cyclic commands and processing large data arrays - when applying graphic filters and various special effects.

In essence, it is 57 new instructions designed to speed up video and sound processing. The remaining changes in the kernel have already become a typical increase in the amount of cache memory, improved cache-memory and other blocks. A processor was produced at a 0.35-μm process, 4.5 million transistors. Maximum frequency 233 MHz.
The release of supercalar CYRIX 6x86 processors on the M1 kernel, which actually was the 5th generation processor, the distinctive feature of which were "deep" conveyors and the use of classic x86 commands without any additional instruction sets.
At the end of the year, while Intel was developed by Pentiumii, again declared itself AMD, releaseing the sixth generation processor K6. The AMD-K6 is based on the kernel developed by Nexgen engineers for the NX686 processor and significantly refined in AMD. Like K5, the kernel K6 was operated on not x86 instructions, but a Risc-like microcode. The processor supported the MMX commands and the 100-megahertse system bus and had an increased level of the first level cache-up to 64 KB. Soon it became clear that Pentiumii would turn out to be K6 not in teeth.

from 1997 to this day ...
By 1997, the directions of engineering developments of the X86 architecture of leading manufacturers were already developed. The next stage in the development of X86 processors can be characterized as a confrontation of architectures that continues and so on. The distance for a major account was released: capturing the 90% of the Intel market, stubbornly with her beating AMD, repeatedly losing in production facilities, and Cyrix, which will later be purchased by VIA, and then at all, without preparing competition, cannave in the unknown. The remaining manufacturers will not be able to compete with adequately and will be forced to look for other niches in the market. The transition from CISC to the RISC-like microcomands to a lesser extent in Intel, in the greater AMD. Moreover, the CISC commands still come to the input and output of the X86 processors. And why, in fact, began to enter in x86 processors with their native CISC architecture inner RISC architecture, allowing to deepen parallelization of command execution? Yes, it was simply from CISC architecture x86 even during the fourth generation, everything was pushed out, and methods to improve performance at the level of the basic sets of commands was left.

Of fundamentally new changes and breakthroughs in the development of architecture have not been since then, although modern processors are faster, for example, the "386th" hundreds of times. Engineers are honed and improving the existing microarchitets of the nuclei, and the new ones are only recycled old. All improvements and attempts to increase productivity are reduced to optimizing existing solutions, the introduction of various corrections and "crutches" for the lame FPU, the system of organization of conveyors and caches. Beaten, but still effective means is a constant increase in the volume of cache memory and frequency of the FSB bus. Modern processors have up to 2 MB cache, operating at the core frequency, and frequency system Tires Achieve 800 MHz, and that using a multiplier, since the real generated frequency of only 200 MHz. Over the past 7 years, the following "backup innovations" was introduced into the X86 processors: cache memory finally moved to the crystal of the processor and translated into the core frequency, the branch prediction blocks as compensation for an increase in the length (number of stages) of the conveyor, a dynamic change mechanism were entered The procedure for executing instructions that reduces the amount of idle clocks, data pre-election mechanism for more rational use of cache memory. Multiple additional command sets: SSE, SSE2, SSE3, 3DNow!, 3DNow Professional. If MMX still could be called with an additional set of X86 instructions, then all subsequent sets are unlikely, since there is nothing to add to the x86 commands. The meaning of the appearance of these sets is an attempt to use a floating point calculation unit as little as possible in this form, in which it is, since, having high performance, it is distinguished by a small fitness for high-precision computing, the capriciousness of the internal architecture and its unpredictability. that complicates the life of programmers. That is, actually introduced a specialized calculation unit, oriented not on the calculation at all, but to real, frequently found tasks, which are offered bypassing the classic FPU.

Somehow it is more like the fight against the consequences of the integration of the mathematical coprocessor in the CPU in the distant 1989. In any case, if you think about and calculate, most of the time the processor spends "on yourself" - on all sorts of transformations, predictions and much more, and not to perform the program code.
Looking back, it can be seen that not everything was smooth. The introduction of the multiplication coefficient and the resulting asynchrony, as well as an increase in the number of stages of the conveyor - all this sticks about two ends. On the one hand, it made it possible to increase the processor clock frequencies by almost 4 GHz (and this is not the limit), on the other, they got a bottleneck in the form of the FSB bus and the problem with conditional transitions. But everything is their time, and then, apparently, these were reasonable solutions, as there is always a very angry economic factor.
It should be noted that truly brilliant success in recent years have achieved in the field of semiconductor production. The 90-nanometer technological process of manufacturing CH86 processors has already been mastered, which allows you to reach the clock frequencies close to the microwave range, and the number of transistors in the crystal reaches 170 million (Pentium 4 EE).
We used to assume that the processor is the main device in the PC and what exactly it specifies the tone of the global computerization. But the victorious procession of the X86 architecture, which is sold more than a quarter of a century, began not specifically from the processor, but from the final user device as a whole - IBM PC. Then, IBM did not realize how the brilliant future is waiting for this PC and, without giving the project any value, made it open to everyone. It is the openness of the concept, the success of software and MS DOS is obliged to success IBM PC. And the processor could stand any architecture in it, but it turned out that IBM chose I8088 and I8086, and then everything was twisted, it was necessary ... But from the CPU processor, it was ultimately a kind of universal computor for all cases of life or "smart" device, omnipresent and everything is capable of doing, as they dreamed before. Yes, and the "law" of Gordon Moore (every 2 years, the number of transistors in the crystal of the processor will increase twice) became the law only for Intel, which put it on the edge of his marketing policy, and it is uncomfortable to refuse this word, apparently.

Today you can already firmly say that the architecture of the X86 has entered a dead end. Her contribution to the popularization of the computer as the device is huge, and no one argues with that. However, it is impossible to be relevant forever. Young and strong once stallion became an old klyach, which continues to bargain in the cart. The appetites of users are insatiable, and soon the architecture of the X86 will not be able to satisfy them. Of course, the transition is associated with titanic efforts due to the fact that the Multi-million Multi-World PC Park in its almost absolute majority uses the X86 architecture processors, and most importantly, uses software for x86 code. One day, everything is not turned over, you need years. But the development of 64-bit processors and programs are gaining momentum with an enviable speed, Intel introduced itanium2, and AMD for almost a year produces its Athlon 64, which have no x86 architecture at all, although fully compatible with it and can still perform all old programs. Thus, it can be said that AMD Athlon 64 laid the beginning of the care from the X86 architecture and thereby opened the transition period.
As you can see, the statements that the processor is the fastest growing component of the PC, are far away. Imagine what processors the computers of our children will be equipped. Thick!

In classmates

So now you have a problem if you write a library that will be used as the code of an old school written with WCHAR_T, as defined as the alias for Unsigned short and the new school code written with WCHAR_T as a separate internal type. What type of data do you need to use for string parameters?

This Sad History of Unicode Printf-Style Format Specifiers in Visual C ++ is transferred.

Windows implemented Unicode earlier than most other operating systems. As a result windows solutions For many problems differ from decisions taken by those who waited when the dust is falling. The most striking example of this is to use Windows UCS-2 as enicode encoding. Then it was the encoding recommended by the Unicode Consortium, because Unicode 1.0 supported only 65 "536 characters². The Unicode consortium changed his mind five years later, but by that time it was too late for Windows, which already released Win32S, Windows NT 3.1, Windows NT 3.5 , Windows NT 3.51 and Windows 95 are all of which used UCS-2³.

But today we will talk about the strings of the PRINTF style format.

This is the translation of if FlushInstructionCache Doesn't Do Anything, Why Do You Have to Call It, Revisited.

It is assumed that you will call the FlushInstructionCache function when you generate or modify the executable code in run-time - to read the instructions you write when performing your generated / modified code, and not the old instructions that can remain in the Keshe processor commands.

Earlier we learned that. This is because the simple function of the function was enough to clean the cache of commands.

But in Windows NT, the FlushInstructionCache feature performs real work, since it needs to be notified all other processors about the need to clean their cache.

However, if you look at Windows 10, you will find that the FlushInstructionCache feature looks like a version for Windows 95: she does nothing.

What is the case?

Sometime I was very confused when I see the X86 or X64 software description and could not understand why x64 indicates 64-bit, then for 32-bit x86, and not x32. The latter should be much more familiar and more logical, and x86 is not that not to remember, this figure is not amenable to logic: mathematically 86 more than 64, but in fact it turns out less than twice. From numbers "x86 x64 x32" in this way you can even make a riddle. But in fact ...

x86 is x32, as well as equal to x64

With all this confusion, it turns out everything is simple and, as always, the error goes for those authors who write together the kindle X86 and X64. This is simply wrong, despite the fact that it is written almost everything.

The fact is that x86 is the microprocessor architecture and the hardware platform, which is applicable to thirty-two-bit and sixty four bit programs. The name x86 is obtained from the name of the first intel processor I8086 and a number of subsequent, in which 86 was always attributed to the end. After some time, the digital designations of new processors began to be replaced by the names, so the public learned about Pentium and Celeron, but the X86 platform did not change to this day.

Values \u200b\u200btwo, and the designations are three? x86, x32 and x64 - how to write?

And if x86 is a processor architecture, then x32 and x64 is its discharge - address space, as well as the amount of information that the processor is able to process for one clock.

When programs are written about the compatibility of the X86 compatibility, implying a 32-bit platform, it is incorrect and only misleads. Correctly specify x86_32bit or x86_64bit. Or abbreviated intuitive x32 or x64.

So you can summarize: Now the X86 indicates the old manner (even Microsoft sinters it) when this platform was in the singular and 64-bit no one else knew. When the X64 platform appears, it began to indicate as it is, and the former 32-bit and remained in most cases as x86. And now it is not relevant, mistaken and confuses those who do not understand the essence. And now you understand it. :)

x32 or x64? What to choose? What's better?

Very often the question arises, choose the operating system x32 or x64? That is, thirty-two bit or sixty four bit?
This is a rhetorical, theoretical and controversial question. Obviously, x64 is better, but not always and not in case you use Windows. No, any Windows X64 works slightly black than Windows X32, but only if there are all programs and all drivers under the 64-bit system. Very often, if the computer is modern, it usually has all system drivers to accessories. But the problem lies then in programs and especially video and audio codecs. Be sure to do something. And if thirty-two bit programs can operate in the X64 system, then the drivers and codecs are needed too x64. Year of the year, this problem disappears, but so far it is not dispelled completely. With X32 systems there are no such problems for home it is better to choose exactly such.
p.S. Until 2010, there really had a 32-bit or 64-bit operating system to select a dilemma. Reasons are described by paragraph above. Passed since then five years and such a problem is no longer observed. Of course, it is better to put a 64-bit even thinking if, of course, there are no special important reasons in favor of 32-bit.